| Price | $1 |
|---|---|
| Category | Components |
| Availability | In stock |
| Delivery | Shipped across Lebanon, or collect from the lab |
Two independent D-type flip-flops in one 14-pin DIP, each clocked on the rising edge and each with its own asynchronous preset and clear. One bit of memory apiece: tie Q-bar back to D and you get a toggle that halves the clock, which makes this the standard part for divide-by-2 and divide-by-4, for turning a momentary switch into a latching one, and for counters. High-speed CMOS, so 2 V to 6 V.
Key features
- Two D flip-flops, positive-edge triggered
- Independent preset and clear on each
- Supply 2 V to 6 V
- 25 MHz min clock at 4.5 V, 50 MHz typical
- Buffered inputs, drives up to 10 LSTTL loads
- 14-pin DIP
Details
Specifications
| Model | SN74HC74N |
|---|---|
| Type | Dual D-type positive-edge-triggered flip-flop |
| Package | 14-pin PDIP |
| Operating voltage | 2 V to 6 V |
| Max clock frequency | 25 MHz min at 4.5 V (50 MHz typ) |
| Output current | +/-25 mA per pin max |
| Extras | Asynchronous preset and clear per flip-flop |
| Operating temperature | -40 C to +85 C |
